| dc.contributor |
University of Michigan, Center for Display Technology and Manufacturing, Department of Electrical Engineering and Computer Science, Ann Arbor, MI 48109 |
|
| dc.contributor |
Hosiden and Philips Display Corp. 3‐1, Takatsukadai, 4‐chome, Nishi‐ku, Kobe City, Hyogo, 651‐22, Japan |
|
| dc.creator |
Chiang, Chun‐sung |
|
| dc.creator |
Martin, Sandrine |
|
| dc.creator |
Nahm, Jeong‐yeop |
|
| dc.creator |
Kanicki, Jerzy |
|
| dc.creator |
Ugai, Yasuhiro |
|
| dc.creator |
Yukawa, Teizo |
|
| dc.creator |
Takeuchi, Shu |
|
| dc.date |
2012-07-12T17:24:27Z |
|
| dc.date |
2012-07-12T17:24:27Z |
|
| dc.date |
1998-05 |
|
| dc.date.accessioned |
2022-05-19T13:31:03Z |
|
| dc.date.available |
2022-05-19T13:31:03Z |
|
| dc.identifier |
Chiang, Chun‐sung ; Martin, Sandrine; Nahm, Jeong‐yeop ; Kanicki, Jerzy; Ugai, Yasuhiro; Yukawa, Teizo; Takeuchi, Shu (1998). "Highâ performance topâ gate aâ Si:H TFTs for AMLCDs." SID Symposium Digest of Technical Papers 29(1). <http://hdl.handle.net/2027.42/92080> |
|
| dc.identifier |
0097-966X |
|
| dc.identifier |
2168-0159 |
|
| dc.identifier |
http://hdl.handle.net/2027.42/92080 |
|
| dc.identifier |
9726003 |
|
| dc.identifier |
10.1889/1.1833773 |
|
| dc.identifier |
SID Symposium Digest of Technical Papers |
|
| dc.identifier |
R.R. Troutman and F.R. Libsch, IEDM Tech. Dig. 855 ( 1990 ). |
|
| dc.identifier |
E. Sakai, H. Nakamura, K. Yoshida, and Y. Ugai, digest AMLCD '96, 329 ( 1996 ) |
|
| dc.identifier |
S. Hasegawa and Y. Imai, Philosophical Magazine B 46, 239 ( 1982 ). |
|
| dc.identifier |
J. Sopka, U. Schneider, B. Schroder, M. Favre, F. Finger, and H. Oechsner, IEEE Trans. Electron Devices 36, 2848 ( 1989 ). |
|
| dc.identifier |
C.‐Y. Chen and J. Kanicki, Mat. Res. Soc. Symp. Proc. 424, 77 ( 1997 ). |
|
| dc.identifier |
J. Kanicki, F. R. Libsch, J. Griffith and R. Polastre, Journal of Applied Physics 69, 2339 ( 1991 ). |
|
| dc.identifier |
M. J. Powell, IEEE Trans. Electron Devices 36, 2753 ( 1989 ) |
|
| dc.identifier |
C. Godet, J. Kanicki and A. V. Gelatos, Journal of Applied Physics 71, 5022 ( 1992 ). |
|
| dc.identifier |
T. Yukawa, K. Amano, T. Sunata, Y. Ugai, S. Aoki and K. Okamoto, Japan Display '89, 506 ( 1989 ). |
|
| dc.identifier.uri |
http://localhost:8080/xmlui/handle/CUHPOERS/117418 |
|
| dc.description |
High‐performance top‐gate hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) structures have been fabricated over a large area from plasma‐enhanced chemical vapor deposition (PECVD) materials. The electrical performances of the top‐gate a‐Si:H TFT (μ FE ≅0.75cm 2 /Vsec, V T ≅3.5V, S ≅0.55V/dec) are comparable to the electrical performances observed for an inverted‐staggered bottom‐gate a‐Si:H TFT. We have shown that the TFT field‐effect mobility first increases with the a‐Si:H thickness, and then decreases for thicker a‐Si:H films. This change of the electrical performances can be associated either with the variation of a‐Si:H microstructure with film thickness during the PECVD processes or a large density of TFT back interface states; it also involves the source/drain parasitic access resistances, especially for thick a‐Si:H layers. |
|
| dc.description |
Peer Reviewed |
|
| dc.description |
http://deepblue.lib.umich.edu/bitstream/2027.42/92080/1/1.1833773.pdf |
|
| dc.format |
application/pdf |
|
| dc.publisher |
Blackwell Publishing Ltd |
|
| dc.publisher |
Wiley Periodicals, Inc. |
|
| dc.rights |
IndexNoFollow |
|
| dc.subject |
Electrical Engineering |
|
| dc.subject |
Engineering |
|
| dc.title |
High‐performance top‐gate a‐Si:H TFTs for AMLCDs |
|
| dc.type |
Article |
|