Integration is driving today's cellular phone industry to create single chip cellphone systems. With the integration of Radio Frequency Transmitters into CMOS technology, robust circuits are needed that can scale with new technologies. This thesis explores the challenges of designing a CMOS RF Driver Amplifier capable of outputting +10dBm of power while meeting strict WCDMA cellphone standards. The driver amplifier (DA) is a 2.5V two-stage amplifier consisting of two on-chip inductors and a gain of greater than 20dB. The driver amplifier was had an Adjacent Channel Leakage Ratio (ACLR) of -37dBm and -47dBm at 5MHz and 10MHz respectively. Less than 30mA of current was consumed from a 2.5V power supply leading to an efficiency of 14.0%. The driver amplifier noise seen in the receive band 190MHz away was -155dBm/Hz. With strict noise constraints, future work will eliminate the need for the off SAW chip filter that is utilized between the driver amplifier and the power amplifier to reduce driver amplifier noise contribution.