| dc.contributor |
Electrical and Computer Engineering |
|
| dc.creator |
Craven, Stephen |
|
| dc.creator |
Athanas, Peter M. |
|
| dc.date |
2012-08-24T12:12:48Z |
|
| dc.date |
2012-08-24T12:12:48Z |
|
| dc.date |
2007-01-10 |
|
| dc.date |
2012-08-24T12:12:48Z |
|
| dc.date.accessioned |
2023-03-01T18:52:06Z |
|
| dc.date.available |
2023-03-01T18:52:06Z |
|
| dc.identifier |
EURASIP Journal on Embedded Systems. 2007 Jan 10;2007(1):093652 |
|
| dc.identifier |
http://hdl.handle.net/10919/18934 |
|
| dc.identifier |
https://doi.org/10.1155/2007/93652 |
|
| dc.identifier.uri |
http://localhost:8080/xmlui/handle/CUHPOERS/281584 |
|
| dc.description |
For certain applications, custom computational hardware created using field programmable gate arrays (FPGAs) can produce significant performance improvements over processors, leading some in academia and industry to call for the inclusion of FPGAs in supercomputing clusters. This paper presents a comparative analysis of FPGAs and traditional processors, focusing on floating-point performance and procurement costs, revealing economic hurdles in the adoption of FPGAs for general high-performance computing (HPC). |
|
| dc.description |
Published version |
|
| dc.format |
application/pdf |
|
| dc.format |
text/xml |
|
| dc.format |
application/pdf |
|
| dc.language |
en_US |
|
| dc.rights |
Creative Commons Attribution 4.0 International |
|
| dc.rights |
http://creativecommons.org/licenses/by/4.0/ |
|
| dc.rights |
Stephen Craven et al.; licensee BioMed Central Ltd. |
|
| dc.title |
Examining the Viability of FPGA Supercomputing |
|
| dc.title |
EURASIP Journal on Embedded Systems |
|
| dc.type |
Article - Refereed |
|
| dc.type |
Text |
|